Computer Architecture - Syllabus

Course Overview and Structure

Embark on a profound academic exploration as you delve into the Computer Architecture course (CA) within the distinguished Tribhuvan university's CSIT department. Aligned with the 2074 Syllabus, this course (CSC208) seamlessly merges theoretical frameworks with practical sessions, ensuring a comprehensive understanding of the subject. Rigorous assessment based on a 60 + 20 + 20 marks system, coupled with a challenging passing threshold of , propels students to strive for excellence, fostering a deeper grasp of the course content.

This 3 credit-hour journey unfolds as a holistic learning experience, bridging theory and application. Beyond theoretical comprehension, students actively engage in practical sessions, acquiring valuable skills for real-world scenarios. Immerse yourself in this well-structured course, where each element, from the course description to interactive sessions, is meticulously crafted to shape a well-rounded and insightful academic experience.


Course Description: This course includes concepts of instruction set architecture,

organization or micro-architecture, and system architecture. The instruction set architecture

includes programmer’s abstraction of computer. The micro-architecture consist internal

representation of computers at register and functional unit level. The system architecture

includes organization of computers at the cache and bus level.

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Course Objectives

  •  Discuss representation of data and algorithms used to perform operations on data
  •  Demonstrate different operations in terms of Micro-operations
  •  Explain architecture of basic computer and micro-programmed control unit
  •  Understand and memory and I/O organization of a typical computer system
  •  Demonstrate benefits of pipelined systems

Units

Key Topics

  • Binary Representation
    DA-1.1.1

    Representation of data using binary digits (0s and 1s). This is the fundamental way computers store and process information.

  • BCD Representation
    DA-1.1.2

    Binary Coded Decimal representation, a way to represent decimal numbers using binary digits. This method is used in some computer systems for decimal arithmetic.

  • Alphanumeric Representation
    DA-1.1.3

    Representation of alphanumeric characters (letters and numbers) using binary digits. This is essential for text processing and storage in computers.

  • Complements
    DA-1.1.4

    Representation of negative numbers using complements, which is essential for arithmetic operations in computers.

  • Fixed Point Representation
    DA-1.1.5

    Representation of numbers using fixed point notation, which is used in some computer systems for arithmetic operations.

  • Representing Negative Numbers
    DA-1.1.6

    Methods for representing negative numbers in computers, including sign-magnitude and two's complement representations.

  • Floating Point Representation
    DA-1.1.7

    Representation of real numbers using floating point notation, which is used in computers for scientific and engineering applications.

  • Arithmetic with Complements
    DA-1.1.8

    Arithmetic operations using complements, including addition and subtraction of signed numbers.

  • Overflow
    DA-1.1.9

    Detection and handling of overflow errors that occur during arithmetic operations in computers.

  • Detecting Overflow
    DA-1.1.10

    Methods for detecting overflow errors during arithmetic operations, including flag-based and overflow bit-based detection.

  • Gray Code
    DA-1.2.1

    A binary code that minimizes single-bit errors during data transmission and storage.

  • Self-Complementing Code
    DA-1.2.2

    A binary code that is its own complement, used in some computer systems for error detection and correction.

  • Weighted Code
    DA-1.2.3

    A binary code that assigns different weights to each bit, used in some computer systems for arithmetic operations.

  • Excess-3 Code
    DA-1.2.4

    A binary code used for decimal arithmetic, where each digit is represented by a binary code with a bias of 3.

  • EBCDIC
    DA-1.2.5

    Extended Binary Coded Decimal Interchange Code, a character encoding standard used in some computer systems.

  • Parity Bit
    DA-1.3.1

    A single bit added to a binary code to detect single-bit errors during data transmission and storage.

  • Odd Parity
    DA-1.3.2

    A parity scheme where the parity bit is set to 1 if the number of 1s in the code is odd.

  • Even Parity
    DA-1.3.3

    A parity scheme where the parity bit is set to 1 if the number of 1s in the code is even.

  • Parity Generator & Checker
    DA-1.3.4

    Circuits or algorithms used to generate and check parity bits for error detection in digital systems.

Key Topics

  • Relational Database Design Using ER-to-Relational Mapping
    RE-1

    Learn how to design relational databases using ER-to-relational mapping, including mapping of regular entities, weak entities, relationship types, multivalued attributes, and N-ary relationships.

  • Informal Design Guidelines for Relational Schemas
    RE-2

    Understand informal design guidelines for relational schemas, including semantics of attributes in relations, redundant information in tuples and update anomalies, NULL values in tuples, and generation of spurious tuples.

  • Functional Dependencies
    RE-3

    Study functional dependencies, including definition, inference rules, Armstrong's axioms, attribute closure, equivalence of functional dependencies, and minimal sets of functional dependencies.

  • Normal Forms Based on Primary Keys
    RE-4

    Explore normal forms based on primary keys, including First Normal Form, Second Normal Form, Third Normal Form, and their general definitions.

Key Topics

  • Concept of Backtracking
    BA-1

    This topic introduces the concept of backtracking, a problem-solving strategy that involves recursively exploring all possible solutions and backtracking when a dead end is reached. It also compares and contrasts backtracking with recursion.

  • Backtracking Algorithms
    BA-2

    This topic covers various backtracking algorithms, including those for solving the subset-sum problem, zero-one knapsack problem, and N-queen problem, along with their analysis.

  • Instruction Format and Control Unit
    BA-3

    This topic covers the instruction format, instruction set completeness, and the control unit of a basic computer. It explains how the control unit retrieves and executes instructions.

  • Instruction Cycle and Interrupt Handling
    BA-4

    This topic explains the instruction cycle of a basic computer, including determining the type of instruction, memory reference instructions, input-output instructions, and program interrupts. It also covers the interrupt cycle and how it affects computer operation.

  • Basic Computer Description and Flowchart
    BA-5

    This topic provides a detailed description and flowchart of a basic computer, illustrating how the different components work together to execute instructions and perform tasks.

Key Topics

  • Control Word and Microprogram
    MI-1

    This topic covers the concept of control words and microprograms in microprogrammed control, including their roles in controlling the flow of data and instructions in a computer system.

  • Address Sequencing and Conditional Branch
    MI-2

    This topic explains how address sequencing and conditional branching are used to control the flow of instructions in a microprogrammed control unit, including the use of conditional branch instructions and subroutines.

  • Microinstruction Format and Symbolic Microinstructions
    MI-3

    This topic covers the format of microinstructions and the use of symbolic microinstructions to represent complex control sequences in a microprogrammed control unit.

  • Design of Control Unit
    MI-4

    This topic covers the design principles and considerations for building a control unit using microprogrammed control, including the organization of control memory and the role of the sequencer.

Key Topics

  • CPU Components and Organization
    CE-1

    This topic covers the major components of a CPU and how they are organized to perform tasks efficiently.

  • Instruction Formats and Addressing Modes
    CE-2

    This topic explains the different instruction formats and addressing modes used by a CPU to access and manipulate data.

  • Data Transfer and Manipulation
    CE-3

    This topic discusses the ways in which a CPU transfers and manipulates data, including program control and subroutine calls.

  • Interrupt Handling
    CE-4

    This topic covers the different types of interrupts and how a CPU handles them to ensure efficient processing.

  • RISC vs CISC Architectures
    CE-5

    This topic compares and contrasts the Reduced Instruction Set Computing (RISC) and Complex Instruction Set Computing (CISC) architectures, including their pros and cons.

  • Overlapped Register Windows
    CE-6

    This topic explains the concept of overlapped register windows in RISC architectures and its benefits.

Key Topics

  • Parallel Processing and Flynn's Classification
    PI-1

    This topic covers parallel processing, multiple functional units, and Flynn's classification, which is a method of categorizing computer architectures based on the number of instruction streams and data streams.

  • Pipelining Fundamentals
    PI-2

    This topic introduces the concept of pipelining, demonstrates it with an example, and covers the speedup equation, as well as floating-point addition and subtraction with pipelining.

  • Instruction Level Pipelining
    PI-3

    This topic explores instruction level pipelining, including the instruction cycle, three and four-segment instruction pipelines, pipeline conflicts, and solutions to these conflicts.

  • Vector Processing and Applications
    PI-4

    This topic covers vector processing, its applications, vector operations, and matrix multiplication, which are essential concepts in computer architecture.

Key Topics

  • Nature of Internship
    CO-1

    The internship work should be relevant to the field of computer science and information technology, with a minimum duration of 180 hours or ten weeks.

  • Phases of Internship
    CO-2

    The internship evaluation consists of three phases: Proposal Submission, Mid-Term Submission, and Final Submission.

  • Provision of Supervision
    CO-3

    A regular faculty member of the college is assigned as a supervisor to supervise the students throughout the internship period.

  • Provision of Mentorship
    CO-4

    A regular employee of the intern providing organization is assigned as a mentor to guide the students throughout the internship period.

  • Evaluation Scheme
    CO-5

    The evaluation scheme consists of Proposal Defense, Midterm, and Final Defense, with a total of 200 marks.

  • Report Contents
    CO-6

    The internship report should contain prescribed content flow, including introduction, problem statement, objectives, and references.

Key Topics

  • Introduction to E-commerce
    IN-1

    Overview of E-commerce and its significance in the digital age.

  • E-business vs E-commerce
    IN-2

    Understanding the differences between E-business and E-commerce.

  • Features of E-commerce
    IN-3

    Key characteristics and benefits of E-commerce.

  • Pure vs Partial E-commerce
    IN-4

    Types of E-commerce models and their applications.

  • History of E-commerce
    IN-5

    Evolution and development of E-commerce over time.

Key Topics

  • Memory Hierarchy
    ME-1

    The organization of memory in a computer system, including main memory, RAM, ROM, and auxiliary memory. This topic covers the memory address map and connection to the CPU.

  • Main Memory
    ME-2

    The primary storage for data and program instructions in a computer system, including RAM and ROM chips.

  • Associative Memory
    ME-3

    A type of memory that uses hardware organization and match logic to perform read and write operations.

  • Cache Memory
    ME-4

    A small, fast memory that stores frequently accessed data, using locality of reference and mapping to improve performance.

  • Auxiliary Memory
    ME-5

    Secondary storage devices, including magnetic disks and magnetic tapes, used to store data and programs when not in use by the CPU.

Lab works

Laboratory Work

Student should be able to implement and simulate the algorithms by using high level

languages like C/Matlab and/or VHDL/Verilog. Laboratory work must include following

exercises:

1 Laboratory work for familiarizing with the syntax, data types, and operators of

Verilog/VHDL

2 Design of n-bit 2’s complement adder/subtractor

3 Design of Overflow detector in signed number addition

4 Design of parity generator and parity checker

5 Design of encoder and decoders

6 Design of multiplexer

7 Design of registers and memory

8 Memory Mapping

9 Design of control unit

10 Design of ALU

11 Design of CPU

12 Simulation of 5 stage or 4 stage or 3 stage pipelining

13 Simulation of addition and subtraction of signed 2’s complement data

14 Simulation of multiplication and division algorithms