Computer Architecture - Syllabus
Embark on a profound academic exploration as you delve into the Computer Architecture course (CA) within the distinguished Tribhuvan university's CSIT department. Aligned with the 2074 Syllabus, this course (CSC208) seamlessly merges theoretical frameworks with practical sessions, ensuring a comprehensive understanding of the subject. Rigorous assessment based on a 60 + 20 + 20 marks system, coupled with a challenging passing threshold of , propels students to strive for excellence, fostering a deeper grasp of the course content.
This 3 credit-hour journey unfolds as a holistic learning experience, bridging theory and application. Beyond theoretical comprehension, students actively engage in practical sessions, acquiring valuable skills for real-world scenarios. Immerse yourself in this well-structured course, where each element, from the course description to interactive sessions, is meticulously crafted to shape a well-rounded and insightful academic experience.
Course Description: This course includes concepts of instruction set architecture,
organization or micro-architecture, and system architecture. The instruction set architecture
includes programmer’s abstraction of computer. The micro-architecture consist internal
representation of computers at register and functional unit level. The system architecture
includes organization of computers at the cache and bus level.
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Course Objectives
- Discuss representation of data and algorithms used to perform operations on data
- Demonstrate different operations in terms of Micro-operations
- Explain architecture of basic computer and micro-programmed control unit
- Understand and memory and I/O organization of a typical computer system
- Demonstrate benefits of pipelined systems
Units
Key Topics
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Binary Representation
DA-1.1.1Representation of data using binary digits (0s and 1s). This is the fundamental way computers store and process information.
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BCD Representation
DA-1.1.2Binary Coded Decimal representation, a way to represent decimal numbers using binary digits. This method is used in some computer systems for decimal arithmetic.
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Alphanumeric Representation
DA-1.1.3Representation of alphanumeric characters (letters and numbers) using binary digits. This is essential for text processing and storage in computers.
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Complements
DA-1.1.4Representation of negative numbers using complements, which is essential for arithmetic operations in computers.
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Fixed Point Representation
DA-1.1.5Representation of numbers using fixed point notation, which is used in some computer systems for arithmetic operations.
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Representing Negative Numbers
DA-1.1.6Methods for representing negative numbers in computers, including sign-magnitude and two's complement representations.
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Floating Point Representation
DA-1.1.7Representation of real numbers using floating point notation, which is used in computers for scientific and engineering applications.
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Arithmetic with Complements
DA-1.1.8Arithmetic operations using complements, including addition and subtraction of signed numbers.
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Overflow
DA-1.1.9Detection and handling of overflow errors that occur during arithmetic operations in computers.
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Detecting Overflow
DA-1.1.10Methods for detecting overflow errors during arithmetic operations, including flag-based and overflow bit-based detection.
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Gray Code
DA-1.2.1A binary code that minimizes single-bit errors during data transmission and storage.
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Self-Complementing Code
DA-1.2.2A binary code that is its own complement, used in some computer systems for error detection and correction.
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Weighted Code
DA-1.2.3A binary code that assigns different weights to each bit, used in some computer systems for arithmetic operations.
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Excess-3 Code
DA-1.2.4A binary code used for decimal arithmetic, where each digit is represented by a binary code with a bias of 3.
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EBCDIC
DA-1.2.5Extended Binary Coded Decimal Interchange Code, a character encoding standard used in some computer systems.
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Parity Bit
DA-1.3.1A single bit added to a binary code to detect single-bit errors during data transmission and storage.
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Odd Parity
DA-1.3.2A parity scheme where the parity bit is set to 1 if the number of 1s in the code is odd.
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Even Parity
DA-1.3.3A parity scheme where the parity bit is set to 1 if the number of 1s in the code is even.
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Parity Generator & Checker
DA-1.3.4Circuits or algorithms used to generate and check parity bits for error detection in digital systems.
Key Topics
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Relational Database Design Using ER-to-Relational Mapping
RE-1Learn how to design relational databases using ER-to-relational mapping, including mapping of regular entities, weak entities, relationship types, multivalued attributes, and N-ary relationships.
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Informal Design Guidelines for Relational Schemas
RE-2Understand informal design guidelines for relational schemas, including semantics of attributes in relations, redundant information in tuples and update anomalies, NULL values in tuples, and generation of spurious tuples.
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Functional Dependencies
RE-3Study functional dependencies, including definition, inference rules, Armstrong's axioms, attribute closure, equivalence of functional dependencies, and minimal sets of functional dependencies.
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Normal Forms Based on Primary Keys
RE-4Explore normal forms based on primary keys, including First Normal Form, Second Normal Form, Third Normal Form, and their general definitions.
Key Topics
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Concept of Backtracking
BA-1This topic introduces the concept of backtracking, a problem-solving strategy that involves recursively exploring all possible solutions and backtracking when a dead end is reached. It also compares and contrasts backtracking with recursion.
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Backtracking Algorithms
BA-2This topic covers various backtracking algorithms, including those for solving the subset-sum problem, zero-one knapsack problem, and N-queen problem, along with their analysis.
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Instruction Format and Control Unit
BA-3This topic covers the instruction format, instruction set completeness, and the control unit of a basic computer. It explains how the control unit retrieves and executes instructions.
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Instruction Cycle and Interrupt Handling
BA-4This topic explains the instruction cycle of a basic computer, including determining the type of instruction, memory reference instructions, input-output instructions, and program interrupts. It also covers the interrupt cycle and how it affects computer operation.
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Basic Computer Description and Flowchart
BA-5This topic provides a detailed description and flowchart of a basic computer, illustrating how the different components work together to execute instructions and perform tasks.
Key Topics
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Control Word and Microprogram
MI-1This topic covers the concept of control words and microprograms in microprogrammed control, including their roles in controlling the flow of data and instructions in a computer system.
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Address Sequencing and Conditional Branch
MI-2This topic explains how address sequencing and conditional branching are used to control the flow of instructions in a microprogrammed control unit, including the use of conditional branch instructions and subroutines.
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Microinstruction Format and Symbolic Microinstructions
MI-3This topic covers the format of microinstructions and the use of symbolic microinstructions to represent complex control sequences in a microprogrammed control unit.
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Design of Control Unit
MI-4This topic covers the design principles and considerations for building a control unit using microprogrammed control, including the organization of control memory and the role of the sequencer.
Key Topics
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CPU Components and Organization
CE-1This topic covers the major components of a CPU and how they are organized to perform tasks efficiently.
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Instruction Formats and Addressing Modes
CE-2This topic explains the different instruction formats and addressing modes used by a CPU to access and manipulate data.
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Data Transfer and Manipulation
CE-3This topic discusses the ways in which a CPU transfers and manipulates data, including program control and subroutine calls.
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Interrupt Handling
CE-4This topic covers the different types of interrupts and how a CPU handles them to ensure efficient processing.
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RISC vs CISC Architectures
CE-5This topic compares and contrasts the Reduced Instruction Set Computing (RISC) and Complex Instruction Set Computing (CISC) architectures, including their pros and cons.
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Overlapped Register Windows
CE-6This topic explains the concept of overlapped register windows in RISC architectures and its benefits.
Key Topics
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Parallel Processing and Flynn's Classification
PI-1This topic covers parallel processing, multiple functional units, and Flynn's classification, which is a method of categorizing computer architectures based on the number of instruction streams and data streams.
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Pipelining Fundamentals
PI-2This topic introduces the concept of pipelining, demonstrates it with an example, and covers the speedup equation, as well as floating-point addition and subtraction with pipelining.
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Instruction Level Pipelining
PI-3This topic explores instruction level pipelining, including the instruction cycle, three and four-segment instruction pipelines, pipeline conflicts, and solutions to these conflicts.
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Vector Processing and Applications
PI-4This topic covers vector processing, its applications, vector operations, and matrix multiplication, which are essential concepts in computer architecture.
Key Topics
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Nature of Internship
CO-1The internship work should be relevant to the field of computer science and information technology, with a minimum duration of 180 hours or ten weeks.
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Phases of Internship
CO-2The internship evaluation consists of three phases: Proposal Submission, Mid-Term Submission, and Final Submission.
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Provision of Supervision
CO-3A regular faculty member of the college is assigned as a supervisor to supervise the students throughout the internship period.
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Provision of Mentorship
CO-4A regular employee of the intern providing organization is assigned as a mentor to guide the students throughout the internship period.
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Evaluation Scheme
CO-5The evaluation scheme consists of Proposal Defense, Midterm, and Final Defense, with a total of 200 marks.
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Report Contents
CO-6The internship report should contain prescribed content flow, including introduction, problem statement, objectives, and references.
Key Topics
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Introduction to E-commerce
IN-1Overview of E-commerce and its significance in the digital age.
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E-business vs E-commerce
IN-2Understanding the differences between E-business and E-commerce.
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Features of E-commerce
IN-3Key characteristics and benefits of E-commerce.
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Pure vs Partial E-commerce
IN-4Types of E-commerce models and their applications.
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History of E-commerce
IN-5Evolution and development of E-commerce over time.
Key Topics
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Memory Hierarchy
ME-1The organization of memory in a computer system, including main memory, RAM, ROM, and auxiliary memory. This topic covers the memory address map and connection to the CPU.
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Main Memory
ME-2The primary storage for data and program instructions in a computer system, including RAM and ROM chips.
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Associative Memory
ME-3A type of memory that uses hardware organization and match logic to perform read and write operations.
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Cache Memory
ME-4A small, fast memory that stores frequently accessed data, using locality of reference and mapping to improve performance.
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Auxiliary Memory
ME-5Secondary storage devices, including magnetic disks and magnetic tapes, used to store data and programs when not in use by the CPU.
Lab works
Laboratory Work
Student should be able to implement and simulate the algorithms by using high level
languages like C/Matlab and/or VHDL/Verilog. Laboratory work must include following
exercises:
1 Laboratory work for familiarizing with the syntax, data types, and operators of
Verilog/VHDL
2 Design of n-bit 2’s complement adder/subtractor
3 Design of Overflow detector in signed number addition
4 Design of parity generator and parity checker
5 Design of encoder and decoders
6 Design of multiplexer
7 Design of registers and memory
8 Memory Mapping
9 Design of control unit
10 Design of ALU
11 Design of CPU
12 Simulation of 5 stage or 4 stage or 3 stage pipelining
13 Simulation of addition and subtraction of signed 2’s complement data
14 Simulation of multiplication and division algorithms