Digital Logic 2074

Tribhuwan University
Institute of Science and Technology
2074
Bachelor Level / First Semester / Science
Computer Science and Information Technology ( CSC111 )
( Digital Logic )
Full Marks: 60
Pass Marks: 24
Time: 3 hours
Candidates are required to give their answers in their own words as far as practicable.
The figures in the margin indicate full marks.

Attempt any two questions:

1. Implement the following function  using

(a) Decoder

(b) Multiplexer

(c) PLA

10 marks view

2. Differentiate between PAL and PLA. Design a counter as shown in the state diagram below 


10 marks view

3. Draw a block diagram, truth table and logic circuit of 1*16 Demultiplexer and explain its working principle. 

10 marks view

Attempt any eight questions:

4. Perform the arithmetic operation (+42)+(-13) and (-42)-(-13) in binary using the signed -2's-complement representation for negative numbers. 

5 marks view

5. Express the complement of the following function in sum of minterms.


5 marks view

6. Reduce the following function using k-map

F = wxy + yz + xy'z + x'y

5 marks view

7. Design a combinational circuit with three inputs and six outputs. The output binary number should be the square of the input binary number.

5 marks view

8. Design a 5 x 32 decoder with four 3 x 8 decoder with enable and one  2 x 4 decoder. Use block diagrams only. 

5 marks view

9. Design and explain the Decimal adder with truth table and suitable diagram.

5 marks view

10. Explain shift register with parallel load. Highlight on its practical implications.

5 marks view

11. Explain master slave J-K flipflop.

5 marks view

12. Write short notes on (any two):

(a) State diagram

(b) De-Morgan's theorem

(c) TTL

5 marks view