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Tribhuvan university CSIT 2074 Syllabus Digital System Design

Digital System Design - Syllabus

Course Overview and Structure
Syllabus Notes Old Questions Unit Wise Questions Question Bank

Embark on a profound academic exploration as you delve into the Digital System Design course (DSD) within the distinguished Tribhuvan university's CSIT department. Aligned with the 2074 Syllabus, this course (CSC417) seamlessly merges theoretical frameworks with practical sessions, ensuring a comprehensive understanding of the subject. Rigorous assessment based on a 60+20+20 marks system, coupled with a challenging passing threshold of , propels students to strive for excellence, fostering a deeper grasp of the course content.

This 3 credit-hour journey unfolds as a holistic learning experience, bridging theory and application. Beyond theoretical comprehension, students actively engage in practical sessions, acquiring valuable skills for real-world scenarios. Immerse yourself in this well-structured course, where each element, from the course description to interactive sessions, is meticulously crafted to shape a well-rounded and insightful academic experience.


Course Description:

This course contains the introductory part of combinational Logic along with the clear concepts of K-Maps and Quine- Mc Cluskey Method. It also introduces sequential networks with flip flops and FSM. Another concept includes FPGA and VHDL and also testing and verification.

Course Objective:

The course objective is to provide ample knowledge on digital design process and to enhance the knowledge of hardware design in real scenarios.

Units

Key Topics

  • Compiler Structure
    UN-1.1

    Analysis and Synthesis Model of Compilation, including different sub-phases within analysis and synthesis phases.

  • Compiler Concepts
    UN-1.2

    Basic concepts related to Compiler, including interpreter, simple One-Pass Compiler, preprocessor, macros, symbol table, and error handler.

  • Institutional Infrastructural Preparedness
    UN-1.3

    Institutional infrastructural preparedness refers to the readiness of government agencies and institutions to adopt and implement e-governance systems.

  • Human Infrastructural Preparedness
    UN-1.4

    Human infrastructural preparedness involves the development of skills and capacities of public officials and citizens to effectively use e-governance systems.

  • Technological Infrastructural Preparedness
    UN-1.5

    Technological infrastructural preparedness refers to the availability and quality of technology infrastructure, including computers, internet connectivity, and other digital tools.

  • Present Global Trends in E-Governance
    UN-1.6

    This topic analyzes the current state of E-Governance globally, including its growth, adoption, and impact on governments and societies.

  • Other Issues in E-Governance
    UN-1.7

    This topic covers additional topics and concerns related to E-Governance, including security, privacy, and ethics.

  • TTL and CMOS Integrated Circuit Logic Devices
    UN-1.8

    This topic focuses on the characteristics and applications of TTL and CMOS integrated circuit logic devices.

Key Topics

  • Lexical Analysis
    UN-2.1

    The process of breaking the source code into a series of tokens. It involves the specification and recognition of tokens, input buffer, and finite automata relevant to compiler construction.

  • Syntax Analysis
    UN-2.2

    The process of analyzing the syntax of the source code. It involves basic parsing techniques, problem of left recursion, left factoring, ambiguous grammar, top-down parsing, bottom-up parsing, and LR parsing.

  • Semantic Analysis
    UN-2.3

    The process of analyzing the meaning of the source code. It involves static and dynamic checks, typical semantic errors, scoping, type checking, syntax directed definitions, and translation.

  • Matrix Representations
    UN-2.4

    This topic explains how matrices can be used to represent and perform geometrical transformations in computer graphics. It covers the basics of matrix operations and their applications in transformation matrices.

  • Window to View Port Transformation
    UN-2.5

    This topic covers the process of transforming a window coordinate system to a view port coordinate system, including the concepts of windowing, viewing, and porting. It explains the importance of this transformation in computer graphics.

  • 3D Viewing
    UN-2.6

    This topic covers the concepts of 3D viewing, including camera models, view volumes, and projection types. It explains how 3D viewing is used to create realistic and interactive 3D graphics.

Combinational Network Design: K – Map, Synthesis and Minimization with K – Maps (AND – OR, OR-AND, NAND-NAND, NOR-NOR), Standard Combinational Networks

Key Topics

  • Intermediate Code Generation
    UN-4.1

    This topic covers the generation of intermediate code, including high-level and low-level representations, syntax trees, and three-address code. It also discusses the generation of intermediate code for declarations, assignments, control flow, boolean expressions, and procedure calls.

  • Code Generation
    UN-4.2

    This topic explores the factors affecting code generation, including target language, basic blocks, and flow graphs. It also covers dynamic programming code-generation algorithms.

  • Code Optimization
    UN-4.3

    This topic discusses the need and criteria for code optimization, as well as basic optimization techniques to improve code efficiency.

  • Compiler Case Studies
    UN-4.4

    This topic presents case studies of compilers, including C and C++ compilers, to illustrate the application of compiler design principles.

  • Testing the Backup and Recovery Plan
    UN-4.5

    Validating the effectiveness of a backup and recovery strategy through regular testing and simulation exercises.

  • Parallel Instance Recovery
    UN-4.6

    A recovery technique that involves creating a temporary instance of a database to minimize downtime and data loss.

  • Recovering from Non-Critical Losses
    UN-4.7

    Techniques and strategies for recovering from non-critical data losses, including data reconstruction and repair.

  • Full Custom Design
    UN-4.8

    A design approach that involves creating a custom integrated circuit (IC) from scratch. It offers high performance and low power consumption, but is time-consuming and expensive.

Sequential Networks: Transition from combinational to sequential network, Direct command flip flop, Initialization of sequential network, Level Enabled Flip-Flops, Synchronization of sequential networks, Edge-triggered Flip Flops, Synchronous and Asynchronous Signals

Sequential Networks as Finite State Machines: Standard Models, Realization with ASM Diagrams, Synthesis of Synchronous FSM, Time Behavior of Synchronous FSM, Design of input forming, Logic and Output Forming Logic of state machine.

Field Programmable Gate Arrays (FPGA), VHDL and its use in programmable logic devices (PLDs) like FPGA

Testing and Verification, Testing Logic Circuits, Combinational gate testing, Combinational network testing, Sequential Testing, Test vector generation, fault, fault model and fault detection, SA0, SA1, Design for Testability

Lab works

Laboratory Works:

Laboratory Exercise should cover the implementation of combinational and sequential circuits, FSM, FPGA and VHDL. Testing and verification of circuits.

Project Work:

Design a sample of tool kit by using the design concepts of the course.